2022-01-25 09:15:49 +01:00
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From 98b43f8c80a3ce16363f6a386b23bda10a738ffa Mon Sep 17 00:00:00 2001
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2021-12-11 19:14:30 +01:00
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From: Martijn Braam <martijn@brixit.nl>
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2022-01-25 09:15:49 +01:00
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Date: Sun, 13 Dec 2020 19:21:12 +0100
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Subject: [PATCH 2/8] Add ppp dt
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2021-12-11 19:14:30 +01:00
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---
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2022-01-25 09:15:49 +01:00
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arch/arm/dts/rk3399-pinephone-pro-u-boot.dtsi | 43 ++
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arch/arm/dts/rk3399-pinephone-pro.dts | 520 +++++++++++++++++++
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2 files changed, 563 insertions(+)
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2021-12-11 19:14:30 +01:00
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create mode 100644 arch/arm/dts/rk3399-pinephone-pro-u-boot.dtsi
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create mode 100644 arch/arm/dts/rk3399-pinephone-pro.dts
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diff --git a/arch/arm/dts/rk3399-pinephone-pro-u-boot.dtsi b/arch/arm/dts/rk3399-pinephone-pro-u-boot.dtsi
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new file mode 100644
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2022-01-25 09:15:49 +01:00
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index 0000000000..7a058477db
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2021-12-11 19:14:30 +01:00
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--- /dev/null
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+++ b/arch/arm/dts/rk3399-pinephone-pro-u-boot.dtsi
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2022-01-25 09:15:49 +01:00
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@@ -0,0 +1,43 @@
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2021-12-11 19:14:30 +01:00
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+// SPDX-License-Identifier: GPL-2.0+
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+/*
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+ * Copyright (C) 2019 Peter Robinson <pbrobinson at gmail.com>
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+ */
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+
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+#include "rk3399-u-boot.dtsi"
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+#include "rk3399-sdram-lpddr4-100.dtsi"
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+
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+/ {
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+ aliases {
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+ spi0 = &spi1;
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+ };
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+
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+ chosen {
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2022-01-25 09:15:49 +01:00
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+ u-boot,spl-boot-order = "same-as-spl", &sdhci, &spiflash, &sdmmc;
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2021-12-11 19:14:30 +01:00
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+ };
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+
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+ config {
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+ u-boot,spl-payload-offset = <0x60000>; /* @ 384KB */
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+ };
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+};
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+
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+&i2c0 {
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+ u-boot,dm-pre-reloc;
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+};
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+
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+&rk818 {
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+ u-boot,dm-pre-reloc;
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+};
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+
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+&rng {
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+ status = "okay";
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+};
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+
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+&sdhci {
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+ max-frequency = <25000000>;
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+ u-boot,dm-pre-reloc;
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+};
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+
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+&sdmmc {
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+ max-frequency = <20000000>;
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+ u-boot,dm-pre-reloc;
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+};
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diff --git a/arch/arm/dts/rk3399-pinephone-pro.dts b/arch/arm/dts/rk3399-pinephone-pro.dts
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new file mode 100644
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2022-01-25 09:15:49 +01:00
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index 0000000000..78d4760c8e
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2021-12-11 19:14:30 +01:00
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--- /dev/null
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+++ b/arch/arm/dts/rk3399-pinephone-pro.dts
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@@ -0,0 +1,520 @@
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+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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+/*
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2022-01-25 09:15:49 +01:00
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+ * Copyright (c) 2020 Martijn Braam <martijn@brixit.nl>
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2021-12-11 19:14:30 +01:00
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+ */
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+
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+/dts-v1/;
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+#include "rk3399.dtsi"
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+#include "rk3399-opp.dtsi"
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+
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+/ {
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2022-01-25 09:15:49 +01:00
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+ model = "Pine64 PinePhonePro";
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+ compatible = "pine64,pinephonepro", "rockchip,rk3399";
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2021-12-11 19:14:30 +01:00
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+
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+ chosen {
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+ stdout-path = "serial2:1500000n8";
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+ };
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+
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+ sdio_pwrseq: sdio-pwrseq {
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+ compatible = "mmc-pwrseq-simple";
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+ pinctrl-names = "default";
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+ };
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+
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+ /* Power tree */
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+ /* Root power source */
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+ vcc_sysin: vcc-sysin {
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+ compatible = "regulator-fixed";
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+ regulator-name = "vcc_sysin";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ };
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+
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+ /* Main 3.3v supply */
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+ vcc3v3_sys: vcc3v3-sys {
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+ compatible = "regulator-fixed";
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+ regulator-name = "vcc3v3_sys";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <3300000>;
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+ regulator-max-microvolt = <3300000>;
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+ vin-supply = <&vcc_sysin>;
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+
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+ regulator-state-mem {
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+ regulator-on-in-suspend;
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+ };
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+ };
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+};
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+
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+&cpu_l0 {
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+ cpu-supply = <&vdd_cpu_l>;
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+};
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+
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+&cpu_l1 {
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+ cpu-supply = <&vdd_cpu_l>;
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+};
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+
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+&cpu_l2 {
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+ cpu-supply = <&vdd_cpu_l>;
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+};
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+
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+&cpu_l3 {
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+ cpu-supply = <&vdd_cpu_l>;
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+};
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+
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+&cpu_b0 {
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+ cpu-supply = <&vdd_cpu_b>;
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+};
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+
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+&cpu_b1 {
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+ cpu-supply = <&vdd_cpu_b>;
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+};
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+
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+&emmc_phy {
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+ status = "okay";
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+};
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+
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+&gpu {
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+ mali-supply = <&vdd_gpu>;
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+ status = "okay";
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+};
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+
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+&i2c0 {
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+ clock-frequency = <400000>;
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+ i2c-scl-rising-time-ns = <168>;
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+ i2c-scl-falling-time-ns = <4>;
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+ status = "okay";
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+
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+ rk818: pmic@1c {
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+ compatible = "rockchip,rk818";
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+ reg = <0x1c>;
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+ interrupt-parent = <&gpio1>;
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+ interrupts = <RK_PC5 IRQ_TYPE_LEVEL_LOW>;
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+ #clock-cells = <1>;
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+ clock-output-names = "xin32k", "rk808-clkout2";
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pmic_int_l>;
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+ rockchip,system-power-controller;
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+ wakeup-source;
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+
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+ vcc1-supply = <&vcc_sysin>;
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+ vcc2-supply = <&vcc_sysin>;
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+ vcc3-supply = <&vcc_sysin>;
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+ vcc4-supply = <&vcc_sysin>;
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+ vcc6-supply = <&vcc_sysin>;
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+ vcc7-supply = <&vcc3v3_sys>;
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+ vcc8-supply = <&vcc_sysin>;
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+ vcc9-supply = <&vcc3v3_sys>;
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+
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+ regulators {
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+ vdd_cpu_l: DCDC_REG1 {
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+ regulator-name = "vdd_cpu_1";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <750000>;
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+ regulator-max-microvolt = <1350000>;
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+ regulator-ramp-delay = <6001>;
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+ regulator-state-mem {
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+ regulator-off-in-suspend;
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+ };
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+ };
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+
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+ vdd_center: DCDC_REG2 {
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+ regulator-name = "vdd_center";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <800000>;
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+ regulator-max-microvolt = <1350000>;
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+ regulator-ramp-delay = <6001>;
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+ regulator-state-mem {
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+ regulator-off-in-suspend;
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+ };
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+ };
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+
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+ vcc_ddr: DCDC_REG3 {
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+ regulator-name = "vcc_ddr";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-state-mem {
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+ regulator-on-in-suspend;
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+ };
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+ };
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+
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+ vcc_1v8: DCDC_REG4 {
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+ regulator-name = "vcc_1v8";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <1800000>;
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+ regulator-max-microvolt = <1800000>;
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+ regulator-state-mem {
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+ regulator-on-in-suspend;
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+ regulator-suspend-microvolt = <1800000>;
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+ };
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+ };
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+
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+ vcca3v0_codec: LDO_REG1 {
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+ regulator-name = "vcca3v0_codec";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <3000000>;
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+ regulator-max-microvolt = <3000000>;
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+ regulator-state-mem {
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+ regulator-off-in-suspend;
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+ };
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+ };
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+
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+ vcc3v0_touch: LDO_REG2 {
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+ regulator-name = "vcc3v0_touch";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <3000000>;
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+ regulator-max-microvolt = <3000000>;
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+ regulator-state-mem {
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+ regulator-off-in-suspend;
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+ };
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+ };
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+
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+ vcca1v8_codec: LDO_REG3 {
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+ regulator-name = "vcca1v8_codec";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <1800000>;
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+ regulator-max-microvolt = <1800000>;
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+ regulator-state-mem {
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+ regulator-off-in-suspend;
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+ };
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+ };
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+
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+ vcc_power_on: LDO_REG4 {
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+ regulator-name = "vcc_power_on";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <3300000>;
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+ regulator-max-microvolt = <3300000>;
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+ regulator-state-mem {
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+ regulator-on-in-suspend;
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+ regulator-suspend-microvolt = <3300000>;
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+ };
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+ };
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+
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+ vcc_3v0: LDO_REG5 {
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+ regulator-name = "vcc_3v0";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <3000000>;
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+ regulator-max-microvolt = <3000000>;
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+ regulator-state-mem {
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+ regulator-on-in-suspend;
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+ regulator-suspend-microvolt = <3000000>;
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+ };
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+ };
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+
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+ vcc_1v5: LDO_REG6 {
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+ regulator-name = "vcc_1v5";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <1500000>;
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+ regulator-max-microvolt = <1500000>;
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+ regulator-state-mem {
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+ regulator-on-in-suspend;
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+ regulator-suspend-microvolt = <1500000>;
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+ };
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+ };
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+
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+ vcc1v8_dvp: LDO_REG7 {
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+ regulator-name = "vcc1v8_dvp";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <1800000>;
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+ regulator-max-microvolt = <1800000>;
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+ regulator-state-mem {
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+ regulator-off-in-suspend;
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+ };
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+ };
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+
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+ vcc3v3_s3: LDO_REG8 {
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+ regulator-name = "vcc3v3_s3";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <3300000>;
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+ regulator-max-microvolt = <3300000>;
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+ regulator-state-mem {
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+ regulator-off-in-suspend;
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+ };
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+ };
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+
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+ vcc_sd: LDO_REG9 {
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+ regulator-name = "vcc_sd";
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+ regulator-min-microvolt = <1800000>;
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+ regulator-max-microvolt = <3300000>;
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+ regulator-state-mem {
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+ regulator-on-in-suspend;
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+ regulator-suspend-microvolt = <3300000>;
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+ };
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+ };
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+
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+ vcc3v3_s0: SWITCH_REG {
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+ regulator-name = "vcc3v3_s0";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-state-mem {
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+ regulator-on-in-suspend;
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+ };
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+ };
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+
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+ boost_otg: DCDC_BOOST {
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+ regulator-name = "boost_otg";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <5000000>;
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+ regulator-max-microvolt = <5000000>;
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|
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+ regulator-state-mem {
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+ regulator-on-in-suspend;
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|
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+ regulator-suspend-microvolt = <5000000>;
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+ };
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+ };
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+
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+ otg_switch: OTG_SWITCH {
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+ regulator-name = "otg_switch";
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|
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+ };
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+ };
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+ };
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+
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+ vdd_cpu_b: regulator@40 {
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|
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+ compatible = "silergy,syr827";
|
|
|
|
+ reg = <0x40>;
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|
|
+ fcs,suspend-voltage-selector = <1>;
|
|
|
|
+ pinctrl-names = "default";
|
|
|
|
+ pinctrl-0 = <&vsel1_pin>;
|
|
|
|
+ regulator-name = "vdd_cpu_b";
|
|
|
|
+ regulator-min-microvolt = <712500>;
|
|
|
|
+ regulator-max-microvolt = <1500000>;
|
|
|
|
+ regulator-ramp-delay = <1000>;
|
|
|
|
+ regulator-always-on;
|
|
|
|
+ regulator-boot-on;
|
|
|
|
+
|
|
|
|
+ regulator-state-mem {
|
|
|
|
+ regulator-off-in-suspend;
|
|
|
|
+ };
|
|
|
|
+ };
|
|
|
|
+
|
|
|
|
+ vdd_gpu: regulator@41 {
|
|
|
|
+ compatible = "silergy,syr828";
|
|
|
|
+ reg = <0x41>;
|
|
|
|
+ fcs,suspend-voltage-selector = <1>;
|
|
|
|
+ pinctrl-names = "default";
|
|
|
|
+ pinctrl-0 = <&vsel2_pin>;
|
|
|
|
+ regulator-name = "vdd_gpu";
|
|
|
|
+ regulator-min-microvolt = <712500>;
|
|
|
|
+ regulator-max-microvolt = <1500000>;
|
|
|
|
+ regulator-ramp-delay = <1000>;
|
|
|
|
+ regulator-always-on;
|
|
|
|
+ regulator-boot-on;
|
|
|
|
+
|
|
|
|
+ regulator-state-mem {
|
|
|
|
+ regulator-off-in-suspend;
|
|
|
|
+ };
|
|
|
|
+ };
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
+&i2c1 {
|
|
|
|
+ i2c-scl-rising-time-ns = <300>;
|
|
|
|
+ i2c-scl-falling-time-ns = <15>;
|
|
|
|
+ status = "okay";
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
+&i2c3 {
|
|
|
|
+ i2c-scl-rising-time-ns = <450>;
|
|
|
|
+ i2c-scl-falling-time-ns = <15>;
|
|
|
|
+ status = "okay";
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
+&i2c4 {
|
|
|
|
+ i2c-scl-rising-time-ns = <600>;
|
|
|
|
+ i2c-scl-falling-time-ns = <20>;
|
|
|
|
+ status = "okay";
|
|
|
|
+
|
|
|
|
+ fusb0: typec-portc@22 {
|
|
|
|
+ compatible = "fcs,fusb302";
|
|
|
|
+ reg = <0x22>;
|
|
|
|
+ interrupt-parent = <&gpio1>;
|
|
|
|
+ interrupts = <RK_PA2 IRQ_TYPE_LEVEL_LOW>;
|
|
|
|
+ pinctrl-names = "default";
|
|
|
|
+ pinctrl-0 = <&fusb0_int>;
|
|
|
|
+ status = "okay";
|
|
|
|
+ };
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
+&io_domains {
|
|
|
|
+ status = "okay";
|
|
|
|
+
|
|
|
|
+ bt656-supply = <&vcc1v8_dvp>;
|
|
|
|
+ audio-supply = <&vcca1v8_codec>;
|
|
|
|
+ sdmmc-supply = <&vcc_sd>;
|
|
|
|
+ gpio1830-supply = <&vcc_3v0>;
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
+&pmu_io_domains {
|
|
|
|
+ pmu1830-supply = <&vcc_3v0>;
|
|
|
|
+ status = "okay";
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
+&pinctrl {
|
|
|
|
+ bt {
|
|
|
|
+ bt_enable_h: bt-enable-h {
|
|
|
|
+ rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
|
|
+ };
|
|
|
|
+
|
|
|
|
+ bt_host_wake_l: bt-host-wake-l {
|
|
|
|
+ rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_down>;
|
|
|
|
+ };
|
|
|
|
+
|
|
|
|
+ bt_wake_l: bt-wake-l {
|
|
|
|
+ rockchip,pins = <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
|
|
+ };
|
|
|
|
+ };
|
|
|
|
+
|
|
|
|
+ buttons {
|
|
|
|
+ pwrbtn: pwrbtn {
|
|
|
|
+ rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
|
|
|
|
+ };
|
|
|
|
+ };
|
|
|
|
+
|
|
|
|
+ fusb302x {
|
|
|
|
+ fusb0_int: fusb0-int {
|
|
|
|
+ rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
|
|
|
|
+ };
|
|
|
|
+ };
|
|
|
|
+
|
|
|
|
+ leds {
|
|
|
|
+ work_led_pin: work-led-pin {
|
|
|
|
+ rockchip,pins = <0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
|
|
+ };
|
|
|
|
+
|
|
|
|
+ diy_led_pin: diy-led-pin {
|
|
|
|
+ rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
|
|
+ };
|
|
|
|
+ };
|
|
|
|
+
|
|
|
|
+ pcie {
|
|
|
|
+ pcie_perst: pcie-perst {
|
|
|
|
+ rockchip,pins = <2 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
|
|
+ };
|
|
|
|
+
|
|
|
|
+ pcie_pwr_en: pcie-pwr-en {
|
|
|
|
+ rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
|
|
+ };
|
|
|
|
+ };
|
|
|
|
+
|
|
|
|
+ pmic {
|
|
|
|
+ pmic_int_l: pmic-int-l {
|
|
|
|
+ rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
|
|
|
|
+ };
|
|
|
|
+
|
|
|
|
+ vsel1_pin: vsel1-pin {
|
|
|
|
+ rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>;
|
|
|
|
+ };
|
|
|
|
+
|
|
|
|
+ vsel2_pin: vsel2-pin {
|
|
|
|
+ rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>;
|
|
|
|
+ };
|
|
|
|
+ };
|
|
|
|
+
|
|
|
|
+ sdcard {
|
|
|
|
+ sdmmc0_pwr_h: sdmmc0-pwr-h {
|
|
|
|
+ rockchip,pins = <0 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
|
|
+ };
|
|
|
|
+
|
|
|
|
+ };
|
|
|
|
+
|
|
|
|
+ sdio-pwrseq {
|
|
|
|
+ wifi_enable_h: wifi-enable-h {
|
|
|
|
+ rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
|
|
+ };
|
|
|
|
+ };
|
|
|
|
+
|
|
|
|
+ usb-typec {
|
|
|
|
+ vcc5v0_typec_en: vcc5v0_typec_en {
|
|
|
|
+ rockchip,pins = <1 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
|
|
|
|
+ };
|
|
|
|
+ };
|
|
|
|
+
|
|
|
|
+ usb2 {
|
|
|
|
+ vcc5v0_host_en: vcc5v0-host-en {
|
|
|
|
+ rockchip,pins = <4 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
|
|
+ };
|
|
|
|
+ };
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
+&pwm0 {
|
|
|
|
+ status = "okay";
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
+&pwm1 {
|
|
|
|
+ status = "okay";
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
+&pwm2 {
|
|
|
|
+ status = "okay";
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
+&sdio0 {
|
|
|
|
+ bus-width = <4>;
|
|
|
|
+ cap-sd-highspeed;
|
|
|
|
+ cap-sdio-irq;
|
|
|
|
+ disable-wp;
|
|
|
|
+ keep-power-in-suspend;
|
|
|
|
+ mmc-pwrseq = <&sdio_pwrseq>;
|
|
|
|
+ non-removable;
|
|
|
|
+ pinctrl-names = "default";
|
|
|
|
+ pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
|
|
|
|
+ sd-uhs-sdr104;
|
|
|
|
+ status = "okay";
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
+&sdmmc {
|
|
|
|
+ bus-width = <4>;
|
|
|
|
+ cap-sd-highspeed;
|
|
|
|
+ cd-gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
|
|
|
|
+ disable-wp;
|
|
|
|
+ max-frequency = <150000000>;
|
|
|
|
+ pinctrl-names = "default";
|
|
|
|
+ pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>;
|
|
|
|
+ vmmc-supply = <&vcc3v3_s3>;
|
|
|
|
+ vqmmc-supply = <&vcc_1v8>;
|
|
|
|
+ status = "okay";
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
+&sdhci {
|
|
|
|
+ bus-width = <8>;
|
|
|
|
+ mmc-hs200-1_8v;
|
|
|
|
+ non-removable;
|
|
|
|
+ status = "okay";
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
+&tsadc {
|
|
|
|
+ /* tshut mode 0:CRU 1:GPIO */
|
|
|
|
+ rockchip,hw-tshut-mode = <1>;
|
|
|
|
+ /* tshut polarity 0:LOW 1:HIGH */
|
|
|
|
+ rockchip,hw-tshut-polarity = <1>;
|
|
|
|
+ status = "okay";
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
+&uart2 {
|
|
|
|
+ status = "okay";
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
+&vopb {
|
|
|
|
+ status = "okay";
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
+&vopb_mmu {
|
|
|
|
+ status = "okay";
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
+&vopl {
|
|
|
|
+ status = "okay";
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
+&vopl_mmu {
|
|
|
|
+ status = "okay";
|
|
|
|
+};
|
|
|
|
--
|
2022-01-25 09:15:49 +01:00
|
|
|
2.33.0
|