diff --git a/dev-embedded/u-boot-tools-pinephone-pro/Manifest b/dev-embedded/u-boot-tools-pinephone-pro/Manifest new file mode 100644 index 0000000..7f32ba5 --- /dev/null +++ b/dev-embedded/u-boot-tools-pinephone-pro/Manifest @@ -0,0 +1 @@ +DIST u-boot-2021.10.tar.bz2 17358295 BLAKE2B 2471e31236ae24778b985b8e7a032fe2d480e935e9c5ee77a6aff4821c61f7fb8b3d64f9f964d62d0c076e8ac526f1b9c19f7fa1a974f4665737ab0bfd950d03 SHA512 be5be1c9a54b270307a04177d5577a21c57a02b307bf8b63d0fa2655d1f025c7ce010dca6a1f7f60d4e639c2e6fb6f0a292a2e5d190f1fad478eb12dd786c9da diff --git a/dev-embedded/u-boot-tools-pinephone-pro/files/.gitlab-ci.yml b/dev-embedded/u-boot-tools-pinephone-pro/files/.gitlab-ci.yml new file mode 100644 index 0000000..c88454f --- /dev/null +++ b/dev-embedded/u-boot-tools-pinephone-pro/files/.gitlab-ci.yml @@ -0,0 +1,39 @@ +### Generic CI Template for chrootbuild +# +# +# Usage: chrootbuild [options] +# +# -b Branch to use: +# (unstable/testing/stable-staging/stable; +# arm-unstable/arm-testing/arm-stable) +# default: unstable / arm-unstable +# -c Start with clean chroot fs +# -h This help +# -i Install package(s) to chroot fs +# (for multiple packages repeat -i flag) +# -l List(s) to build +# (for multiple lists repeat -l flag) +# -n Install built pkg to chroot fs +# -p Package(s) to build +# (for multiple packages repeat -p flag) +# -r Remove previously built packages in $PKGDEST +# -s Sign package(s) + +build-package: + tags: + # change the tag to your gitlab-runner + - bigbuilds + - aarch64 + script: + # build pkg via chrootbuild + - export PKG=${PWD##*/} + - cd .. + - sudo chrootbuild -b arm-testing -cp $PKG + - mv -v ./*.pkg.tar.* $PKG + #- sudo pacman -Syy && makepkg -scr --noconfirm + artifacts: + paths: + - ./*.pkg.tar.* + expire_in: 1 week + + diff --git a/dev-embedded/u-boot-tools-pinephone-pro/files/0001-PPP.patch b/dev-embedded/u-boot-tools-pinephone-pro/files/0001-PPP.patch new file mode 100644 index 0000000..f2326a6 --- /dev/null +++ b/dev-embedded/u-boot-tools-pinephone-pro/files/0001-PPP.patch @@ -0,0 +1,241 @@ +From c4d3ac73a3f19d2372e3d35e833665b2ee1f11fa Mon Sep 17 00:00:00 2001 +From: Martijn Braam +Date: Sat, 12 Dec 2020 13:31:03 +0100 +Subject: [PATCH 1/8] PPP + +--- + arch/arm/mach-rockchip/rk3399/Kconfig | 7 ++ + board/pine64/pinephone-pro-rk3399/Kconfig | 15 +++ + board/pine64/pinephone-pro-rk3399/MAINTAINERS | 8 ++ + board/pine64/pinephone-pro-rk3399/Makefile | 1 + + .../pinephone-pro-rk3399.c | 56 +++++++++++ + configs/pinephone-pro-rk3399_defconfig | 92 +++++++++++++++++++ + 6 files changed, 179 insertions(+) + create mode 100644 board/pine64/pinephone-pro-rk3399/Kconfig + create mode 100644 board/pine64/pinephone-pro-rk3399/MAINTAINERS + create mode 100644 board/pine64/pinephone-pro-rk3399/Makefile + create mode 100644 board/pine64/pinephone-pro-rk3399/pinephone-pro-rk3399.c + create mode 100644 configs/pinephone-pro-rk3399_defconfig + +diff --git a/arch/arm/mach-rockchip/rk3399/Kconfig b/arch/arm/mach-rockchip/rk3399/Kconfig +index 17628f9171..35b1125906 100644 +--- a/arch/arm/mach-rockchip/rk3399/Kconfig ++++ b/arch/arm/mach-rockchip/rk3399/Kconfig +@@ -28,6 +28,13 @@ config TARGET_PINEBOOK_PRO_RK3399 + with 4Gb RAM, onboard eMMC, USB-C, a USB3 and USB2 port, + 1920*1080 screen and all the usual laptop features. + ++config TARGET_PINEPHONE_PRO_RK3399 ++ bool "PinePhone Pro" ++ help ++ PinePhone Pro is a phone based on the Rockchip rk3399 SoC ++ with 4Gb RAM, onboard eMMC, USB-C, a headphone jack, ++ 720x1440 screen and an external Quectel USB modem. ++ + config TARGET_PUMA_RK3399 + bool "Theobroma Systems RK3399-Q7 (Puma)" + help +diff --git a/board/pine64/pinephone-pro-rk3399/Kconfig b/board/pine64/pinephone-pro-rk3399/Kconfig +new file mode 100644 +index 0000000000..13d6465ae6 +--- /dev/null ++++ b/board/pine64/pinephone-pro-rk3399/Kconfig +@@ -0,0 +1,15 @@ ++if TARGET_PINEPHONE_PRO_RK3399 ++ ++config SYS_BOARD ++ default "pinephone-pro-rk3399" ++ ++config SYS_VENDOR ++ default "pine64" ++ ++config SYS_CONFIG_NAME ++ default "pinephone-pro-rk3399" ++ ++config BOARD_SPECIFIC_OPTIONS ++ def_bool y ++ ++endif +diff --git a/board/pine64/pinephone-pro-rk3399/MAINTAINERS b/board/pine64/pinephone-pro-rk3399/MAINTAINERS +new file mode 100644 +index 0000000000..227c1c0bea +--- /dev/null ++++ b/board/pine64/pinephone-pro-rk3399/MAINTAINERS +@@ -0,0 +1,8 @@ ++PINEBOOK_PRO ++M: Peter Robinson ++S: Maintained ++F: board/pine64/rk3399-pinebook-pro/ ++F: include/configs/rk3399-pinebook-pro.h ++F: arch/arm/dts/rk3399-pinebook-pro.dts ++F: arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi ++F: configs/pinebook-pro-rk3399_defconfig +diff --git a/board/pine64/pinephone-pro-rk3399/Makefile b/board/pine64/pinephone-pro-rk3399/Makefile +new file mode 100644 +index 0000000000..8d9203053e +--- /dev/null ++++ b/board/pine64/pinephone-pro-rk3399/Makefile +@@ -0,0 +1 @@ ++obj-y += pinephone-pro-rk3399.o +diff --git a/board/pine64/pinephone-pro-rk3399/pinephone-pro-rk3399.c b/board/pine64/pinephone-pro-rk3399/pinephone-pro-rk3399.c +new file mode 100644 +index 0000000000..d79084614f +--- /dev/null ++++ b/board/pine64/pinephone-pro-rk3399/pinephone-pro-rk3399.c +@@ -0,0 +1,56 @@ ++// SPDX-License-Identifier: GPL-2.0+ ++/* ++ * (C) Copyright 2019 Vasily Khoruzhick ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#define GRF_IO_VSEL_BT565_SHIFT 0 ++#define PMUGRF_CON0_VSEL_SHIFT 8 ++ ++#ifdef CONFIG_MISC_INIT_R ++static void setup_iodomain(void) ++{ ++ struct rk3399_grf_regs *grf = ++ syscon_get_first_range(ROCKCHIP_SYSCON_GRF); ++ struct rk3399_pmugrf_regs *pmugrf = ++ syscon_get_first_range(ROCKCHIP_SYSCON_PMUGRF); ++ ++ /* BT565 is in 1.8v domain */ ++ rk_setreg(&grf->io_vsel, 1 << GRF_IO_VSEL_BT565_SHIFT); ++ ++ /* Set GPIO1 1.8v/3.0v source select to PMU1830_VOL */ ++ rk_setreg(&pmugrf->soc_con0, 1 << PMUGRF_CON0_VSEL_SHIFT); ++} ++ ++int misc_init_r(void) ++{ ++ const u32 cpuid_offset = 0x7; ++ const u32 cpuid_length = 0x10; ++ u8 cpuid[cpuid_length]; ++ int ret; ++ ++ setup_iodomain(); ++ ++ ret = rockchip_cpuid_from_efuse(cpuid_offset, cpuid_length, cpuid); ++ if (ret) ++ return ret; ++ ++ ret = rockchip_cpuid_set(cpuid, cpuid_length); ++ if (ret) ++ return ret; ++ ++ ret = rockchip_setup_macaddr(); ++ ++ return ret; ++} ++ ++#endif +diff --git a/configs/pinephone-pro-rk3399_defconfig b/configs/pinephone-pro-rk3399_defconfig +new file mode 100644 +index 0000000000..320ce65ffb +--- /dev/null ++++ b/configs/pinephone-pro-rk3399_defconfig +@@ -0,0 +1,92 @@ ++CONFIG_ARM=y ++CONFIG_ARCH_ROCKCHIP=y ++CONFIG_SYS_TEXT_BASE=0x00200000 ++CONFIG_NR_DRAM_BANKS=1 ++CONFIG_ENV_SIZE=0x8000 ++CONFIG_ROCKCHIP_RK3399=y ++CONFIG_TARGET_PINEPHONE_PRO_RK3399=y ++CONFIG_DEBUG_UART_BASE=0xFF1A0000 ++CONFIG_DEBUG_UART_CLOCK=24000000 ++CONFIG_SPL_SPI_FLASH_SUPPORT=y ++CONFIG_SPL_SPI_SUPPORT=y ++CONFIG_DEFAULT_DEVICE_TREE="rk3399-pinephone-pro" ++CONFIG_DEBUG_UART=y ++CONFIG_BOOTDELAY=3 ++CONFIG_USE_PREBOOT=y ++CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-pinephone-pro.dtb" ++CONFIG_DISPLAY_BOARDINFO_LATE=y ++CONFIG_MISC_INIT_R=y ++# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set ++CONFIG_SPL_STACK_R=y ++CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 ++CONFIG_SPL_MTD_SUPPORT=y ++CONFIG_SPL_SPI_LOAD=y ++CONFIG_TPL=y ++CONFIG_CMD_BOOTZ=y ++CONFIG_CMD_GPIO=y ++CONFIG_CMD_GPT=y ++CONFIG_CMD_I2C=y ++CONFIG_CMD_MMC=y ++CONFIG_CMD_PCI=y ++CONFIG_CMD_USB=y ++# CONFIG_CMD_SETEXPR is not set ++CONFIG_CMD_TIME=y ++CONFIG_CMD_PMIC=y ++CONFIG_CMD_REGULATOR=y ++CONFIG_SPL_OF_CONTROL=y ++CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" ++CONFIG_ENV_IS_IN_SPI_FLASH=y ++CONFIG_SYS_RELOC_GD_ENV_ADDR=y ++CONFIG_ROCKCHIP_GPIO=y ++CONFIG_SYS_I2C_ROCKCHIP=y ++CONFIG_DM_KEYBOARD=y ++CONFIG_LED=y ++CONFIG_LED_GPIO=y ++CONFIG_MISC=y ++CONFIG_ROCKCHIP_EFUSE=y ++CONFIG_MMC_DW=y ++CONFIG_MMC_DW_ROCKCHIP=y ++CONFIG_MMC_SDHCI=y ++CONFIG_MMC_SDHCI_SDMA=y ++CONFIG_MMC_SDHCI_ROCKCHIP=y ++CONFIG_SF_DEFAULT_SPEED=20000000 ++CONFIG_SPI_FLASH_GIGADEVICE=y ++CONFIG_SPI_FLASH_WINBOND=y ++CONFIG_DM_ETH=y ++CONFIG_NVME=y ++CONFIG_PCI=y ++CONFIG_PHY_ROCKCHIP_INNO_USB2=y ++CONFIG_PHY_ROCKCHIP_TYPEC=y ++CONFIG_DM_PMIC_FAN53555=y ++CONFIG_PMIC_RK8XX=y ++CONFIG_REGULATOR_PWM=y ++CONFIG_REGULATOR_RK8XX=y ++CONFIG_PWM_ROCKCHIP=y ++CONFIG_RAM_RK3399_LPDDR4=y ++CONFIG_DM_RESET=y ++CONFIG_DM_RNG=y ++CONFIG_RNG_ROCKCHIP=y ++CONFIG_BAUDRATE=1500000 ++CONFIG_DEBUG_UART_SHIFT=2 ++CONFIG_ROCKCHIP_SPI=y ++CONFIG_SYSRESET=y ++CONFIG_USB=y ++CONFIG_USB_XHCI_HCD=y ++CONFIG_USB_XHCI_DWC3=y ++CONFIG_USB_EHCI_HCD=y ++CONFIG_USB_EHCI_GENERIC=y ++CONFIG_USB_OHCI_HCD=y ++CONFIG_USB_OHCI_GENERIC=y ++CONFIG_USB_DWC3=y ++CONFIG_USB_DWC3_GENERIC=y ++CONFIG_USB_KEYBOARD=y ++CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y ++CONFIG_USB_HOST_ETHER=y ++CONFIG_USB_ETHER_ASIX=y ++CONFIG_USB_ETHER_RTL8152=y ++CONFIG_DM_VIDEO=y ++CONFIG_DISPLAY=y ++CONFIG_VIDEO_ROCKCHIP=y ++CONFIG_DISPLAY_ROCKCHIP_EDP=y ++CONFIG_SPL_TINY_MEMSET=y ++CONFIG_ERRNO_STR=y +-- +2.33.0 diff --git a/dev-embedded/u-boot-tools-pinephone-pro/files/0002-Add-ppp-dt.patch b/dev-embedded/u-boot-tools-pinephone-pro/files/0002-Add-ppp-dt.patch new file mode 100644 index 0000000..997d0aa --- /dev/null +++ b/dev-embedded/u-boot-tools-pinephone-pro/files/0002-Add-ppp-dt.patch @@ -0,0 +1,589 @@ +From 98b43f8c80a3ce16363f6a386b23bda10a738ffa Mon Sep 17 00:00:00 2001 +From: Martijn Braam +Date: Sun, 13 Dec 2020 19:21:12 +0100 +Subject: [PATCH 2/8] Add ppp dt + +--- + arch/arm/dts/rk3399-pinephone-pro-u-boot.dtsi | 43 ++ + arch/arm/dts/rk3399-pinephone-pro.dts | 520 +++++++++++++++++++ + 2 files changed, 563 insertions(+) + create mode 100644 arch/arm/dts/rk3399-pinephone-pro-u-boot.dtsi + create mode 100644 arch/arm/dts/rk3399-pinephone-pro.dts + +diff --git a/arch/arm/dts/rk3399-pinephone-pro-u-boot.dtsi b/arch/arm/dts/rk3399-pinephone-pro-u-boot.dtsi +new file mode 100644 +index 0000000000..7a058477db +--- /dev/null ++++ b/arch/arm/dts/rk3399-pinephone-pro-u-boot.dtsi +@@ -0,0 +1,43 @@ ++// SPDX-License-Identifier: GPL-2.0+ ++/* ++ * Copyright (C) 2019 Peter Robinson ++ */ ++ ++#include "rk3399-u-boot.dtsi" ++#include "rk3399-sdram-lpddr4-100.dtsi" ++ ++/ { ++ aliases { ++ spi0 = &spi1; ++ }; ++ ++ chosen { ++ u-boot,spl-boot-order = "same-as-spl", &sdhci, &spiflash, &sdmmc; ++ }; ++ ++ config { ++ u-boot,spl-payload-offset = <0x60000>; /* @ 384KB */ ++ }; ++}; ++ ++&i2c0 { ++ u-boot,dm-pre-reloc; ++}; ++ ++&rk818 { ++ u-boot,dm-pre-reloc; ++}; ++ ++&rng { ++ status = "okay"; ++}; ++ ++&sdhci { ++ max-frequency = <25000000>; ++ u-boot,dm-pre-reloc; ++}; ++ ++&sdmmc { ++ max-frequency = <20000000>; ++ u-boot,dm-pre-reloc; ++}; +diff --git a/arch/arm/dts/rk3399-pinephone-pro.dts b/arch/arm/dts/rk3399-pinephone-pro.dts +new file mode 100644 +index 0000000000..78d4760c8e +--- /dev/null ++++ b/arch/arm/dts/rk3399-pinephone-pro.dts +@@ -0,0 +1,520 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++/* ++ * Copyright (c) 2020 Martijn Braam ++ */ ++ ++/dts-v1/; ++#include "rk3399.dtsi" ++#include "rk3399-opp.dtsi" ++ ++/ { ++ model = "Pine64 PinePhonePro"; ++ compatible = "pine64,pinephonepro", "rockchip,rk3399"; ++ ++ chosen { ++ stdout-path = "serial2:1500000n8"; ++ }; ++ ++ sdio_pwrseq: sdio-pwrseq { ++ compatible = "mmc-pwrseq-simple"; ++ pinctrl-names = "default"; ++ }; ++ ++ /* Power tree */ ++ /* Root power source */ ++ vcc_sysin: vcc-sysin { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc_sysin"; ++ regulator-always-on; ++ regulator-boot-on; ++ }; ++ ++ /* Main 3.3v supply */ ++ vcc3v3_sys: vcc3v3-sys { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc3v3_sys"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ vin-supply = <&vcc_sysin>; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ }; ++ }; ++}; ++ ++&cpu_l0 { ++ cpu-supply = <&vdd_cpu_l>; ++}; ++ ++&cpu_l1 { ++ cpu-supply = <&vdd_cpu_l>; ++}; ++ ++&cpu_l2 { ++ cpu-supply = <&vdd_cpu_l>; ++}; ++ ++&cpu_l3 { ++ cpu-supply = <&vdd_cpu_l>; ++}; ++ ++&cpu_b0 { ++ cpu-supply = <&vdd_cpu_b>; ++}; ++ ++&cpu_b1 { ++ cpu-supply = <&vdd_cpu_b>; ++}; ++ ++&emmc_phy { ++ status = "okay"; ++}; ++ ++&gpu { ++ mali-supply = <&vdd_gpu>; ++ status = "okay"; ++}; ++ ++&i2c0 { ++ clock-frequency = <400000>; ++ i2c-scl-rising-time-ns = <168>; ++ i2c-scl-falling-time-ns = <4>; ++ status = "okay"; ++ ++ rk818: pmic@1c { ++ compatible = "rockchip,rk818"; ++ reg = <0x1c>; ++ interrupt-parent = <&gpio1>; ++ interrupts = ; ++ #clock-cells = <1>; ++ clock-output-names = "xin32k", "rk808-clkout2"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pmic_int_l>; ++ rockchip,system-power-controller; ++ wakeup-source; ++ ++ vcc1-supply = <&vcc_sysin>; ++ vcc2-supply = <&vcc_sysin>; ++ vcc3-supply = <&vcc_sysin>; ++ vcc4-supply = <&vcc_sysin>; ++ vcc6-supply = <&vcc_sysin>; ++ vcc7-supply = <&vcc3v3_sys>; ++ vcc8-supply = <&vcc_sysin>; ++ vcc9-supply = <&vcc3v3_sys>; ++ ++ regulators { ++ vdd_cpu_l: DCDC_REG1 { ++ regulator-name = "vdd_cpu_1"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <750000>; ++ regulator-max-microvolt = <1350000>; ++ regulator-ramp-delay = <6001>; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdd_center: DCDC_REG2 { ++ regulator-name = "vdd_center"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <800000>; ++ regulator-max-microvolt = <1350000>; ++ regulator-ramp-delay = <6001>; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc_ddr: DCDC_REG3 { ++ regulator-name = "vcc_ddr"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ }; ++ }; ++ ++ vcc_1v8: DCDC_REG4 { ++ regulator-name = "vcc_1v8"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++ }; ++ ++ vcca3v0_codec: LDO_REG1 { ++ regulator-name = "vcca3v0_codec"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3000000>; ++ regulator-max-microvolt = <3000000>; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc3v0_touch: LDO_REG2 { ++ regulator-name = "vcc3v0_touch"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3000000>; ++ regulator-max-microvolt = <3000000>; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcca1v8_codec: LDO_REG3 { ++ regulator-name = "vcca1v8_codec"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc_power_on: LDO_REG4 { ++ regulator-name = "vcc_power_on"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <3300000>; ++ }; ++ }; ++ ++ vcc_3v0: LDO_REG5 { ++ regulator-name = "vcc_3v0"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3000000>; ++ regulator-max-microvolt = <3000000>; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <3000000>; ++ }; ++ }; ++ ++ vcc_1v5: LDO_REG6 { ++ regulator-name = "vcc_1v5"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1500000>; ++ regulator-max-microvolt = <1500000>; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1500000>; ++ }; ++ }; ++ ++ vcc1v8_dvp: LDO_REG7 { ++ regulator-name = "vcc1v8_dvp"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc3v3_s3: LDO_REG8 { ++ regulator-name = "vcc3v3_s3"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc_sd: LDO_REG9 { ++ regulator-name = "vcc_sd"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <3300000>; ++ }; ++ }; ++ ++ vcc3v3_s0: SWITCH_REG { ++ regulator-name = "vcc3v3_s0"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ }; ++ }; ++ ++ boost_otg: DCDC_BOOST { ++ regulator-name = "boost_otg"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <5000000>; ++ }; ++ }; ++ ++ otg_switch: OTG_SWITCH { ++ regulator-name = "otg_switch"; ++ }; ++ }; ++ }; ++ ++ vdd_cpu_b: regulator@40 { ++ compatible = "silergy,syr827"; ++ reg = <0x40>; ++ fcs,suspend-voltage-selector = <1>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&vsel1_pin>; ++ regulator-name = "vdd_cpu_b"; ++ regulator-min-microvolt = <712500>; ++ regulator-max-microvolt = <1500000>; ++ regulator-ramp-delay = <1000>; ++ regulator-always-on; ++ regulator-boot-on; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdd_gpu: regulator@41 { ++ compatible = "silergy,syr828"; ++ reg = <0x41>; ++ fcs,suspend-voltage-selector = <1>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&vsel2_pin>; ++ regulator-name = "vdd_gpu"; ++ regulator-min-microvolt = <712500>; ++ regulator-max-microvolt = <1500000>; ++ regulator-ramp-delay = <1000>; ++ regulator-always-on; ++ regulator-boot-on; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++}; ++ ++&i2c1 { ++ i2c-scl-rising-time-ns = <300>; ++ i2c-scl-falling-time-ns = <15>; ++ status = "okay"; ++}; ++ ++&i2c3 { ++ i2c-scl-rising-time-ns = <450>; ++ i2c-scl-falling-time-ns = <15>; ++ status = "okay"; ++}; ++ ++&i2c4 { ++ i2c-scl-rising-time-ns = <600>; ++ i2c-scl-falling-time-ns = <20>; ++ status = "okay"; ++ ++ fusb0: typec-portc@22 { ++ compatible = "fcs,fusb302"; ++ reg = <0x22>; ++ interrupt-parent = <&gpio1>; ++ interrupts = ; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&fusb0_int>; ++ status = "okay"; ++ }; ++}; ++ ++&io_domains { ++ status = "okay"; ++ ++ bt656-supply = <&vcc1v8_dvp>; ++ audio-supply = <&vcca1v8_codec>; ++ sdmmc-supply = <&vcc_sd>; ++ gpio1830-supply = <&vcc_3v0>; ++}; ++ ++&pmu_io_domains { ++ pmu1830-supply = <&vcc_3v0>; ++ status = "okay"; ++}; ++ ++&pinctrl { ++ bt { ++ bt_enable_h: bt-enable-h { ++ rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ bt_host_wake_l: bt-host-wake-l { ++ rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_down>; ++ }; ++ ++ bt_wake_l: bt-wake-l { ++ rockchip,pins = <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ buttons { ++ pwrbtn: pwrbtn { ++ rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ }; ++ ++ fusb302x { ++ fusb0_int: fusb0-int { ++ rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ }; ++ ++ leds { ++ work_led_pin: work-led-pin { ++ rockchip,pins = <0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ diy_led_pin: diy-led-pin { ++ rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ pcie { ++ pcie_perst: pcie-perst { ++ rockchip,pins = <2 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ pcie_pwr_en: pcie-pwr-en { ++ rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ pmic { ++ pmic_int_l: pmic-int-l { ++ rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ ++ vsel1_pin: vsel1-pin { ++ rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>; ++ }; ++ ++ vsel2_pin: vsel2-pin { ++ rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>; ++ }; ++ }; ++ ++ sdcard { ++ sdmmc0_pwr_h: sdmmc0-pwr-h { ++ rockchip,pins = <0 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ }; ++ ++ sdio-pwrseq { ++ wifi_enable_h: wifi-enable-h { ++ rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ usb-typec { ++ vcc5v0_typec_en: vcc5v0_typec_en { ++ rockchip,pins = <1 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ }; ++ ++ usb2 { ++ vcc5v0_host_en: vcc5v0-host-en { ++ rockchip,pins = <4 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++}; ++ ++&pwm0 { ++ status = "okay"; ++}; ++ ++&pwm1 { ++ status = "okay"; ++}; ++ ++&pwm2 { ++ status = "okay"; ++}; ++ ++&sdio0 { ++ bus-width = <4>; ++ cap-sd-highspeed; ++ cap-sdio-irq; ++ disable-wp; ++ keep-power-in-suspend; ++ mmc-pwrseq = <&sdio_pwrseq>; ++ non-removable; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>; ++ sd-uhs-sdr104; ++ status = "okay"; ++}; ++ ++&sdmmc { ++ bus-width = <4>; ++ cap-sd-highspeed; ++ cd-gpios = <&gpio0 7 GPIO_ACTIVE_LOW>; ++ disable-wp; ++ max-frequency = <150000000>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>; ++ vmmc-supply = <&vcc3v3_s3>; ++ vqmmc-supply = <&vcc_1v8>; ++ status = "okay"; ++}; ++ ++&sdhci { ++ bus-width = <8>; ++ mmc-hs200-1_8v; ++ non-removable; ++ status = "okay"; ++}; ++ ++&tsadc { ++ /* tshut mode 0:CRU 1:GPIO */ ++ rockchip,hw-tshut-mode = <1>; ++ /* tshut polarity 0:LOW 1:HIGH */ ++ rockchip,hw-tshut-polarity = <1>; ++ status = "okay"; ++}; ++ ++&uart2 { ++ status = "okay"; ++}; ++ ++&vopb { ++ status = "okay"; ++}; ++ ++&vopb_mmu { ++ status = "okay"; ++}; ++ ++&vopl { ++ status = "okay"; ++}; ++ ++&vopl_mmu { ++ status = "okay"; ++}; +-- +2.33.0 diff --git a/dev-embedded/u-boot-tools-pinephone-pro/files/0003-Config-changes.patch b/dev-embedded/u-boot-tools-pinephone-pro/files/0003-Config-changes.patch new file mode 100644 index 0000000..da45a05 --- /dev/null +++ b/dev-embedded/u-boot-tools-pinephone-pro/files/0003-Config-changes.patch @@ -0,0 +1,25 @@ +From 6e64cdb39e4452315cf9a4d1e9e89691403c3089 Mon Sep 17 00:00:00 2001 +From: Martijn Braam +Date: Sun, 13 Dec 2020 19:36:14 +0100 +Subject: [PATCH 3/8] Config changes + +--- + configs/pinephone-pro-rk3399_defconfig | 2 -- + 1 file changed, 2 deletions(-) + +diff --git a/configs/pinephone-pro-rk3399_defconfig b/configs/pinephone-pro-rk3399_defconfig +index 320ce65ffb..1c2e7f278d 100644 +--- a/configs/pinephone-pro-rk3399_defconfig ++++ b/configs/pinephone-pro-rk3399_defconfig +@@ -53,8 +53,6 @@ CONFIG_SF_DEFAULT_SPEED=20000000 + CONFIG_SPI_FLASH_GIGADEVICE=y + CONFIG_SPI_FLASH_WINBOND=y + CONFIG_DM_ETH=y +-CONFIG_NVME=y +-CONFIG_PCI=y + CONFIG_PHY_ROCKCHIP_INNO_USB2=y + CONFIG_PHY_ROCKCHIP_TYPEC=y + CONFIG_DM_PMIC_FAN53555=y +-- +2.33.0 + diff --git a/dev-embedded/u-boot-tools-pinephone-pro/files/0004-Add-kconfig-include.patch b/dev-embedded/u-boot-tools-pinephone-pro/files/0004-Add-kconfig-include.patch new file mode 100644 index 0000000..efed2f7 --- /dev/null +++ b/dev-embedded/u-boot-tools-pinephone-pro/files/0004-Add-kconfig-include.patch @@ -0,0 +1,24 @@ +From 4101d635fb8d82a5f6e63decccddfcfdea9f081e Mon Sep 17 00:00:00 2001 +From: Martijn Braam +Date: Sun, 13 Dec 2020 19:48:37 +0100 +Subject: [PATCH 4/8] Add kconfig include + +--- + arch/arm/mach-rockchip/rk3399/Kconfig | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/arch/arm/mach-rockchip/rk3399/Kconfig b/arch/arm/mach-rockchip/rk3399/Kconfig +index 35b1125906..3ba603ca80 100644 +--- a/arch/arm/mach-rockchip/rk3399/Kconfig ++++ b/arch/arm/mach-rockchip/rk3399/Kconfig +@@ -161,6 +161,7 @@ endif # BOOTCOUNT_LIMIT + source "board/firefly/roc-pc-rk3399/Kconfig" + source "board/google/gru/Kconfig" + source "board/pine64/pinebook-pro-rk3399/Kconfig" ++source "board/pine64/pinephone-pro-rk3399/Kconfig" + source "board/pine64/rockpro64_rk3399/Kconfig" + source "board/rockchip/evb_rk3399/Kconfig" + source "board/theobroma-systems/puma_rk3399/Kconfig" +-- +2.33.0 + diff --git a/dev-embedded/u-boot-tools-pinephone-pro/files/0005-Add-pinephone-pro-rk3399.h.patch b/dev-embedded/u-boot-tools-pinephone-pro/files/0005-Add-pinephone-pro-rk3399.h.patch new file mode 100644 index 0000000..d28fba1 --- /dev/null +++ b/dev-embedded/u-boot-tools-pinephone-pro/files/0005-Add-pinephone-pro-rk3399.h.patch @@ -0,0 +1,41 @@ +From 13c8c6945856e57958fdf7e4ef338c21e1199f19 Mon Sep 17 00:00:00 2001 +From: Martijn Braam +Date: Sun, 13 Dec 2020 19:52:09 +0100 +Subject: [PATCH 5/8] Add pinephone-pro-rk3399.h + +--- + include/configs/pinephone-pro-rk3399.h | 22 ++++++++++++++++++++++ + 1 file changed, 22 insertions(+) + create mode 100644 include/configs/pinephone-pro-rk3399.h + +diff --git a/include/configs/pinephone-pro-rk3399.h b/include/configs/pinephone-pro-rk3399.h +new file mode 100644 +index 0000000000..aaaa344839 +--- /dev/null ++++ b/include/configs/pinephone-pro-rk3399.h +@@ -0,0 +1,22 @@ ++/* SPDX-License-Identifier: GPL-2.0+ */ ++/* ++ * Copyright (C) 2016 Rockchip Electronics Co., Ltd ++ * Copyright (C) 2020 Peter Robinson ++ */ ++ ++#ifndef __PINEPHONE_PRO_RK3399_H ++#define __PINEPHONE_PRO_RK3399_H ++ ++#define ROCKCHIP_DEVICE_SETTINGS \ ++ "stdin=serial,usbkbd\0" \ ++ "stdout=serial,vidconsole\0" \ ++ "stderr=serial,vidconsole\0" ++ ++#include ++ ++#define SDRAM_BANK_SIZE (2UL << 30) ++ ++#define CONFIG_USB_OHCI_NEW ++#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 ++ ++#endif +-- +2.33.0 + diff --git a/dev-embedded/u-boot-tools-pinephone-pro/files/0006-Added-dts-to-makefile.patch b/dev-embedded/u-boot-tools-pinephone-pro/files/0006-Added-dts-to-makefile.patch new file mode 100644 index 0000000..f24e81e --- /dev/null +++ b/dev-embedded/u-boot-tools-pinephone-pro/files/0006-Added-dts-to-makefile.patch @@ -0,0 +1,23 @@ +From 3e8d6e4d57dd15acf104a8f11ff18833f8d7adc7 Mon Sep 17 00:00:00 2001 +From: Martijn Braam +Date: Sun, 13 Dec 2020 19:57:49 +0100 +Subject: [PATCH 6/8] Added dts to makefile + +--- + arch/arm/dts/Makefile | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile +index e2e8a5fb7a..ff07ae0270 100644 +--- a/arch/arm/dts/Makefile ++++ b/arch/arm/dts/Makefile +@@ -135,6 +135,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3399) += \ + rk3399-nanopi-r4s.dtb \ + rk3399-orangepi.dtb \ + rk3399-pinebook-pro.dtb \ ++ rk3399-pinephone-pro.dtb \ + rk3399-puma-haikou.dtb \ + rk3399-roc-pc.dtb \ + rk3399-roc-pc-mezzanine.dtb \ +-- +2.33.0 diff --git a/dev-embedded/u-boot-tools-pinephone-pro/files/0007-u-boot.dtsi-fixes.patch b/dev-embedded/u-boot-tools-pinephone-pro/files/0007-u-boot.dtsi-fixes.patch new file mode 100644 index 0000000..9e09c0c --- /dev/null +++ b/dev-embedded/u-boot-tools-pinephone-pro/files/0007-u-boot.dtsi-fixes.patch @@ -0,0 +1,24 @@ +From 19150d65b1bed6831ba92a4cf3e7262518f1049f Mon Sep 17 00:00:00 2001 +From: Martijn Braam +Date: Sun, 13 Dec 2020 20:02:56 +0100 +Subject: [PATCH 7/8] u-boot.dtsi fixes + +--- + arch/arm/dts/rk3399-pinephone-pro-u-boot.dtsi | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/arch/arm/dts/rk3399-pinephone-pro-u-boot.dtsi b/arch/arm/dts/rk3399-pinephone-pro-u-boot.dtsi +index 7a058477db..e52263aafe 100644 +--- a/arch/arm/dts/rk3399-pinephone-pro-u-boot.dtsi ++++ b/arch/arm/dts/rk3399-pinephone-pro-u-boot.dtsi +@@ -12,7 +12,7 @@ + }; + + chosen { +- u-boot,spl-boot-order = "same-as-spl", &sdhci, &spiflash, &sdmmc; ++ u-boot,spl-boot-order = "same-as-spl", &sdhci, &sdmmc; + }; + + config { +-- +2.33.0 diff --git a/dev-embedded/u-boot-tools-pinephone-pro/files/0008-fix-boot-order.patch b/dev-embedded/u-boot-tools-pinephone-pro/files/0008-fix-boot-order.patch new file mode 100644 index 0000000..a18a904 --- /dev/null +++ b/dev-embedded/u-boot-tools-pinephone-pro/files/0008-fix-boot-order.patch @@ -0,0 +1,44 @@ +From b212ad24a604b00b240add35516b7381965deb31 Mon Sep 17 00:00:00 2001 +From: Alex Bee +Date: Thu, 17 Jun 2021 11:01:12 +0200 +Subject: [PATCH] rockchip: Fix MMC boot order + +Basically all, i.e. rk3036.dtsi, rk3128.dtsi, rk3xxx.dtsi, rk322x.dtsi, +rk3288.dtsi, rk3308-u-boot.dtsi, rk3328-u-boot.dtsi, rk3399-u-boot.dtsi +and px30-u-boot.dtsi Rockchip SoC devicetrees which have mmc indexes +are defining eMMC as mmc0 and sdmmc as mmc1. +This means that the rule to try to boot from the SD card first is ignored, +which as per comment is what we want and is important for distros, which +rely on that. + +Fix this by setting the correct mmc index, i.e. first from mmc1 (SD card), +second from mmc0 (eMMC). + +Signed-off-by: Alex Bee +Reviewed-by: Kever Yang +--- + include/configs/rockchip-common.h | 6 +++--- + 1 file changed, 3 insertions(+), 3 deletions(-) + +diff --git a/include/configs/rockchip-common.h b/include/configs/rockchip-common.h +index 0b9e24d1db..ba7061a287 100644 +--- a/include/configs/rockchip-common.h ++++ b/include/configs/rockchip-common.h +@@ -14,11 +14,11 @@ + + #ifndef CONFIG_SPL_BUILD + +-/* First try to boot from SD (index 0), then eMMC (index 1) */ ++/* First try to boot from SD (index 1), then eMMC (index 0) */ + #if CONFIG_IS_ENABLED(CMD_MMC) + #define BOOT_TARGET_MMC(func) \ +- func(MMC, mmc, 0) \ +- func(MMC, mmc, 1) ++ func(MMC, mmc, 1) \ ++ func(MMC, mmc, 0) + #else + #define BOOT_TARGET_MMC(func) + #endif +-- +GitLab + diff --git a/dev-embedded/u-boot-tools-pinephone-pro/files/0009-Correct-boot-order-to-be-USB-SD-eMMC.patch b/dev-embedded/u-boot-tools-pinephone-pro/files/0009-Correct-boot-order-to-be-USB-SD-eMMC.patch new file mode 100644 index 0000000..5b218b5 --- /dev/null +++ b/dev-embedded/u-boot-tools-pinephone-pro/files/0009-Correct-boot-order-to-be-USB-SD-eMMC.patch @@ -0,0 +1,28 @@ +From f97401137daa1cb75532c373bbcb5011f1e03585 Mon Sep 17 00:00:00 2001 +From: Dan Johansen +Date: Sun, 10 Oct 2021 20:19:02 +0200 +Subject: [PATCH] Correct boot order to be USB -> SD -> eMMC + +Signed-off-by: Dan Johansen +--- + include/configs/rockchip-common.h | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/include/configs/rockchip-common.h b/include/configs/rockchip-common.h +index ba7061a287..5dc92373b2 100644 +--- a/include/configs/rockchip-common.h ++++ b/include/configs/rockchip-common.h +@@ -55,9 +55,9 @@ + + #ifdef CONFIG_ROCKCHIP_RK3399 + #define BOOT_TARGET_DEVICES(func) \ ++ BOOT_TARGET_USB(func) \ + BOOT_TARGET_MMC(func) \ + BOOT_TARGET_NVME(func) \ +- BOOT_TARGET_USB(func) \ + BOOT_TARGET_PXE(func) \ + BOOT_TARGET_DHCP(func) \ + BOOT_TARGET_SF(func) +-- +2.33.0 + diff --git a/dev-embedded/u-boot-tools-pinephone-pro/files/uboot-pinephonepro.install b/dev-embedded/u-boot-tools-pinephone-pro/files/uboot-pinephonepro.install new file mode 100644 index 0000000..b4fd113 --- /dev/null +++ b/dev-embedded/u-boot-tools-pinephone-pro/files/uboot-pinephonepro.install @@ -0,0 +1,39 @@ +notice_uboot() { + echo "New version of U-Boot firmware can be flashed to your microSD card" + echo "or eMMC module. You can do that by running:" + echo "# dd if=/boot/idbloader.img of=/dev/mmcblkX seek=64 conv=notrunc,fsync" + echo "# dd if=/boot/u-boot.itb of=/dev/mmcblkX seek=16384 conv=notrunc,fsync" +} + +create_config() { + mkdir -p /boot/extlinux + echo "LABEL Manjaro ARM +KERNEL /Image +FDT /dtbs/rockchip/rk3399-pinephone-pro.dtb +APPEND initrd=/initramfs-linux.img console=ttyS2,1500000 root=LABEL=ROOT_MNJRO rw rootwait quiet splash plymouth.ignore-serial-consoles" > /boot/extlinux/extlinux.conf +} + +post_install() { + notice_uboot + if [ -f /boot/extlinux/extlinux.conf.pacsave ]; then + mv /boot/extlinux/extlinux.conf.pacsave /boot/extlinux/extlinux.conf + fi + if [ -f /boot/extlinux/extlinux.conf ]; then + echo "Keeping old extlinux.conf file..." + else + create_config + fi +} + +post_upgrade() { + notice_uboot + if [ -f /boot/extlinux/extlinux.conf.pacsave ]; then + mv /boot/extlinux/extlinux.conf.pacsave /boot/extlinux/extlinux.conf + fi + if [ -f /boot/extlinux/extlinux.conf ]; then + echo "Keeping old extlinux.conf file..." + else + create_config + fi +} + diff --git a/dev-embedded/u-boot-tools-pinephone-pro/u-boot-tools-pinephone-pro-2021.10.ebuild b/dev-embedded/u-boot-tools-pinephone-pro/u-boot-tools-pinephone-pro-2021.10.ebuild new file mode 100644 index 0000000..1c3581c --- /dev/null +++ b/dev-embedded/u-boot-tools-pinephone-pro/u-boot-tools-pinephone-pro-2021.10.ebuild @@ -0,0 +1,89 @@ +# Copyright 1999-2021 Gentoo Authors +# Distributed under the terms of the GNU General Public License v2 + +EAPI=8 + +inherit toolchain-funcs + +MY_P="u-boot-${PV/_/-}" +DESCRIPTION="utilities for working with Das U-Boot" +HOMEPAGE="https://www.denx.de/wiki/U-Boot/WebHome" +SRC_URI="https://ftp.denx.de/pub/u-boot/${MY_P}.tar.bz2" +S="${WORKDIR}/${MY_P}" + +LICENSE="GPL-2" +SLOT="0" +KEYWORDS="~arm64" +IUSE="envtools" + +RDEPEND="dev-libs/openssl:=" +DEPEND="${RDEPEND}" +BDEPEND=" + sys-devel/bison + sys-devel/flex + virtual/pkgconfig +" + +src_prepare() { + default + sed -i 's:\bpkg-config\b:${PKG_CONFIG}:g' \ + scripts/kconfig/{g,m,n,q}conf-cfg.sh \ + scripts/kconfig/Makefile \ + tools/Makefile || die + + eapply "${FILESDIR}"/0001-PPP.patch + eapply "${FILESDIR}"/0002-Add-ppp-dt.patch + eapply "${FILESDIR}"/0003-Config-changes.patch + eapply "${FILESDIR}"/0004-Add-kconfig-include.patch + eapply "${FILESDIR}"/0005-Add-pinephone-pro-rk3399.h.patch + eapply "${FILESDIR}"/0006-Added-dts-to-makefile.patch + eapply "${FILESDIR}"/0007-u-boot.dtsi-fixes.patch + eapply "${FILESDIR}"/0008-fix-boot-order.patch + eapply "${FILESDIR}"/0009-Correct-boot-order-to-be-USB-SD-eMMC.patch +} + +src_configure() { + tc-export AR BUILD_CC CC PKG_CONFIG +} + +src_compile() { + # Unset a few KBUILD variables. Bug #540476 + unset KBUILD_OUTPUT KBUILD_SRC + + local myemakeargs=( + V=1 + AR="${AR}" + CC="${CC}" + HOSTCC="${BUILD_CC}" + HOSTCFLAGS="${CFLAGS} ${CPPFLAGS}"' $(HOSTCPPFLAGS)' + HOSTLDFLAGS="${LDFLAGS}" + ) + + emake "${myemakeargs[@]}" tools-only_defconfig + + emake "${myemakeargs[@]}" \ + NO_SDL=1 \ + HOSTSTRIP=: \ + STRIP=: \ + CONFIG_ENV_OVERWRITE=y \ + $(usex envtools envtools tools-all) +} + +src_test() { :; } + +src_install() { + cd tools || die + + if ! use envtools; then + dobin bmp_logo dumpimage fdtgrep gen_eth_addr img2srec mkenvimage mkimage + fi + + dobin env/fw_printenv + + dosym fw_printenv /usr/bin/fw_setenv + + insinto /etc + doins env/fw_env.config + + doman ../doc/mkimage.1 +}