gjdwebserver-overlay/sys-kernel/pinephone-pro-sources/files/0043-arm64-dts-rk3399-pinephone-pro-Add-support-for-both-.patch
Gerben Jan Dijkman 4b1427b69b Changed ebuild
2022-01-15 02:12:55 +01:00

199 lines
4.3 KiB
Diff

From: Ondrej Jirman <megous@megous.com>
Date: Thu, 21 Oct 2021 20:25:35 +0200
Subject: [PATCH 07/18] arm64: dts: rk3399-pinephone-pro: Add support for both
cameras
IMX258 + OV5640.
Signed-off-by: Ondrej Jirman <megous@megous.com>
---
.../boot/dts/rockchip/rk3399-pinephone-pro.dts | 146 ++++++++++++++++++++-
1 file changed, 142 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-pinephone-pro.dts b/arch/arm64/boot/dts/rockchip/rk3399-pinephone-pro.dts
index 96b5170..3bd36ef 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-pinephone-pro.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-pinephone-pro.dts
@@ -456,8 +456,6 @@ regulator-state-mem {
vcc1v8_dvp: LDO_REG7 {
regulator-name = "vcc1v8_dvp";
- regulator-always-on;
- regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-state-mem {
@@ -579,10 +577,92 @@ regulator-state-mem {
};
};
+/*
+ * Cameras:
+ *
+ * cif clk out = gpio2 B3 / CIF_CLKOUTA_u
+ *
+ * both on i2c1 GPIO4_A1 (SDA) / GPIO4_A2 (SCL)
+ *
+ * both share power:
+ * VCC1V8_DVP - LDO7 - supplied by VCC7 (VCC3V3_SYS)
+ * DVDD_DVP 1.5V - autoenabled by VCC2V8_DVP depends on VCC1V8_S3 (U118 supplies 1.2V, though, not 1.5V)
+ * VCC2V8_DVP af - autoenabled by VCC1V8_DVP depends on VCC3V3_SYS
+ * AVDD2V8_DVP - autoenabled by VCC1V8_DVP depends on VCC3V3_SYS
+ *
+ * mipi0 = imx258
+ * reset = gpio1 A0
+ * powerdown = GPIO2_B4
+ *
+ * mipi1 = OV5640
+ * powerdown = GPIO2_D4
+ *
+ * bt656-supply = <&vcc1v8_dvp>;
+ */
&i2c1 {
+ status = "okay";
+
+ clock-frequency = <400000>;
i2c-scl-rising-time-ns = <300>;
i2c-scl-falling-time-ns = <15>;
- status = "okay";
+
+ pinctrl-0 = <&i2c1_xfer &cif_clkouta>;
+
+ assigned-clocks = <&cru SCLK_CIF_OUT &cru SCLK_CIF_OUT_SRC>;
+ assigned-clock-parents = <&cru SCLK_CIF_OUT_SRC &cru PLL_GPLL>;
+ assigned-clock-rates = <19200000 0>;
+
+ /* Rear-facing camera */
+ wcam: camera@1a {
+ compatible = "sony,imx258";
+ reg = <0x1a>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&wcam_rst &wcam_pdn>;
+
+ clocks = <&cru SCLK_CIF_OUT>;
+ clock-names = "xvclk";
+
+ vif-supply = <&vcc1v8_dvp>;
+ /*XXX: also depends on vcca1v8_codec for I2C bus power */
+
+ reset-gpios = <&gpio1 RK_PA0 GPIO_ACTIVE_LOW>;
+ powerdown-gpios = <&gpio2 RK_PD4 GPIO_ACTIVE_HIGH>;
+ rotation = <180>;
+
+ port {
+ wcam_out: endpoint {
+ remote-endpoint = <&mipi_in_wcam>;
+ data-lanes = <1 2 3 4>;
+ link-frequencies = /bits/ 64 <320000000>;
+ //link-frequencies = /bits/ 64 <633600000>;
+ };
+ };
+ };
+
+ /* Front-facing camera */
+ ucam: camera@3c {
+ compatible = "ovti,ov5640";
+ reg = <0x3c>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&ucam_pdn>;
+
+ clocks = <&cru SCLK_CIF_OUT>;
+ clock-names = "xclk";
+
+ DOVDD-supply = <&vcc1v8_dvp>;
+ /*XXX: also depends on vcca1v8_codec for I2C bus power */
+
+ powerdown-gpios = <&gpio2 RK_PD4 GPIO_ACTIVE_HIGH>;
+ rotation = <180>;
+
+ port {
+ ucam_out: endpoint {
+ remote-endpoint = <&mipi_in_ucam>;
+ data-lanes = <1 2>;
+ clock-lanes = <0>;
+ };
+ };
+ };
};
&i2c3 {
@@ -723,6 +803,50 @@ &io_domains {
gpio1830-supply = <&vcc_3v0>;
};
+&isp0 {
+ status = "okay";
+
+ ports {
+ port@0 {
+ mipi_in_wcam: endpoint@0 {
+ reg = <0>;
+ remote-endpoint = <&wcam_out>;
+ data-lanes = <1 2 3 4>;
+ };
+ };
+ };
+};
+
+&mipi_dphy_rx0 {
+ status = "okay";
+};
+
+&isp1 {
+ status = "okay";
+
+ ports {
+ port@0 {
+ mipi_in_ucam: endpoint@0 {
+ reg = <0>;
+ remote-endpoint = <&ucam_out>;
+ data-lanes = <1 2>;
+ };
+ };
+ };
+};
+
+&isp0_mmu {
+ status = "okay";
+};
+
+&isp1_mmu {
+ status = "okay";
+};
+
+&mipi_dsi1 {
+ status = "okay";
+};
+
&mipi_dsi {
status = "okay";
clock-master;
@@ -783,6 +907,20 @@ pwrbtn_pin: pwrbtn-pin {
};
};
+ camera {
+ wcam_rst: wcam-rst {
+ rockchip,pins = <1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ wcam_pdn: wcam-pdn {
+ rockchip,pins = <2 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ ucam_pdn: ucam-pdn {
+ rockchip,pins = <2 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
fusb302x {
fusb0_int: fusb0-int {
rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
@@ -1033,4 +1171,4 @@ &vopl {
&vopl_mmu {
status = "okay";
-};
\ No newline at end of file
+};